absolute maximum ratings parameter units i d @ v gs = 10v, t c = 25c continuous drain current 3.5 i d @ v gs = 10v, t c = 100c continuous drain current 2.25 i dm pulsed drain current ? 14 p d @ t c = 25c max. power dissipation 1 5 w linear derating factor 0.09 w/c v gs gate-to-source voltage 20 v e as single pulse avalanche energy ? 7.0 mj i ar avalanche current ? -a e ar repetitive avalanche energy ? -mj dv/dt peak diode recovery dv/dt ? 9.0 v/ns t j operating junction -55 to 150 t stg storage temperature range pckg. mounting surface temp. 300 (for 5 s) weight 0.42(typical) g pd - 91699b the leadless chip carrier (lcc) package represents the logical next step in the continual evolution of surface mount technology. desinged to be a close replacement for the to-39 package, the lcc will give designers the extra flexibility they need to increase circuit board den- sity. international rectifier has engineered the lcc pack- age to meet the specific needs of the power market by increasing the size of the bottom source pad, thereby enhancing the thermal and electrical performance. the lid of the package is grounded to the source to reduce rf interference. o c a 1/17/01 www.irf.com 1 lcc-18 product summary part number b vdss r ds(on) i d IRFE110 100v 0.60 ? 3.5a features: ! surface mount ! small footprint ! alternative to to-39 package ! hermetically sealed ! dynamic dv/dt rating ! avalanche energy rating ! simple drive requirements ! light weight for footnotes refer to the last page repetitive avalanche and dv/dt rated jantx2n6782u hexfet ? transistors jantxv2n6782u surface mount (lcc-18) [ref:mil-prf-19500/556] IRFE110 100v, n-channel
IRFE110 2 www.irf.com thermal resistance parameter min typ max units t est conditions r thjc junction to case ? ? 8.3 r thj-pcb junction to pc board ? ? 27 """ soldered to a copper clad pc board c/w source-drain diode ratings and characteristics parameter min typ max units t est conditions i s continuous source current (body diode) ? ? 3.5 i sm pulse source current (body diode) ? ?? 14 v sd diode forward voltage ? ? 1.5 v t j = 25c, i s =3.5a, v gs = 0v ? t rr reverse recovery time ? ? 180 ns t j = 25c, i f = 3.5a, di/dt 100a/ s q rr reverse recovery charge ? ? 2.0 c v dd 50v ? t on forward turn-on time intrinsic turn-on time is negligible. turn-on speed is substantially controlled by l s + l d . a for footnotes refer to the last page electrical characteristics @ tj = 25c (unless otherwise specified) parameter min typ max units t est conditions bv dss drain-to-source breakdown voltage 100 ? ? v v gs = 0v, i d = 1.0ma ? bv dss / ? t j temperature coefficient of breakdown ? 0.12 ? v/c reference to 25c, i d = 1.0ma voltage r ds(on) static drain-to-source on-state ? ? 0.60 v gs = 10v, i d =2.25a ? resistance ? ? 0.69 v gs =10v, i d =3.5a ? v gs(th) gate threshold voltage 2.0 ? 4.0 v v ds = v gs , i d =250a g fs forward transconductance 0.8 ? ? s ( ) v ds > 15v, i ds =2.25a ? i dss zero gate voltage drain current ? ? 2 5 v ds =80v, v gs =0v ? ? 250 v ds =80v v gs = 0v, t j = 125c i gss gate-to-source leakage forward ? ? 100 v gs =20v i gss gate-to-source leakage reverse ? ? -100 v gs =-20v q g total gate charge ? ? 6.6 v gs =10v, id = 3.5a q gs gate-to-source charge ? ? 1.7 nc v ds =50v q gd gate-to-drain (?miller?) charge ? ? 3.5 t d (on) turn-on delay time ? ? 15 v dd =50v, i d =3.5a, t r rise time ? ? 2 5 r g =7.5 ? t d (off) turn-off delay time ? ? 25 t f fall time ? ? 2 0 l s + l d total inductance ? 6.1 ? c iss input capacitance ? 190 v gs = 0v, v ds =25v c oss output capacitance ? 86 ? pf f = 1.0mhz c rss reverse transfer capacitance ? 13 ? na ? nh ns a ? measured from the center of drain pad to center of source pad
www.irf.com 3 IRFE110 fig 4. normalized on-resistance vs. temperature fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics -60 -40 -20 0 20 40 60 80 100 120 140 160 0.0 0.5 1.0 1.5 2.0 2.5 t , junction temperature ( c) r , drain-to-source on resistance (normalized) j ds(on) v = i = gs d 10v 3.1a 0.1 1 10 100 0.1 1 10 100 20s pulse width t = 150 c j top bottom vgs 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v 4.5v v , drain-to-source voltage (v) i , drain-to-source current (a) ds d 4.5v 0.1 1 10 100 0.1 1 10 100 20s pulse width t = 25 c j top bottom vgs 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v 4.5v v , drain-to-source voltage (v) i , drain-to-source current (a) ds d 4.5v 0.1 1 10 100 4 5 6 7 8 9 10 v = 50v 20s pulse width ds v , gate-to-source voltage (v) i , drain-to-source current (a) gs d t = 150 c j t = 25 c j
IRFE110 4 www.irf.com fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage 0.1 1 10 100 0.0 0.5 1.0 1.5 2.0 v ,source-to-drain voltage (v) i , reverse drain current (a) sd sd v = 0 v gs t = 150 c j t = 25 c j 0.1 1 10 100 1 10 100 100 0 operation in this area limited by r ds(on) single pulse t t = 150 c = 25 c j c v , drain-to-source voltage (v) i , drain current (a) i , drain current (a) ds d 100us 1ms 10ms 0 2 4 6 8 0 4 8 12 16 20 q , total gate charge (nc) v , gate-to-source voltage (v) g gs for test circuit see figure i = d 13 3.5 a v = 20v ds v = 50v ds v = 80v ds 1 10 100 0 100 200 300 400 v , drain-to-source voltage (v) c, capacitance (pf) ds v c c c = = = = 0v, c c c f = 1mhz + c + c c shorted gs iss gs gd , ds rss gd oss ds gd c iss c oss c rss
www.irf.com 5 IRFE110 fig 10a. switching time test circuit v ds 90% 10% v gs t d(on) t r t d(off) t f fig 10b. switching time waveforms v ds pulse width 1 s duty factor 0.1 % r d v gs r g d.u.t. 10v + - v dd fig 11. maximum effective transient thermal impedance, junction-to-case fig 9. maximum drain current vs. case temperature 25 50 75 100 125 150 0.0 1.0 2.0 3.0 4.0 t , case temperature ( c) i , d ra i n c urren t (a) c d 0.01 0.1 1 10 100 0.00001 0.0001 0.001 0.01 0.1 1 10 notes: 1. duty factor d = t / t 2. peak t = p x z + t 1 2 j dm thjc c p t t dm 1 2 t , rectangular pulse duration (sec) thermal response (z ) 1 thjc 0.01 0.02 0.05 0.10 0.20 d = 0.50 single pulse (thermal response)
IRFE110 6 www.irf.com q g q gs q gd v g charge d.u.t. v ds i d i g 3ma v gs .3 f 50k ? .2 f 12v current regulator same type as d.u.t. current sampling resistors + - 10 v fig 13b. gate charge test circuit fig 13a. basic gate charge waveform fig 12c. maximum avalanche energy vs. drain current fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit t p v (br)dss i as r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v 10v 25 50 75 100 125 150 0 5 10 15 20 starting t , junction temperature ( c) e , single pulse avalanche energy (mj) j as i d top bottom 1.6a 2.2a 3.5a
www.irf.com 7 IRFE110 foot notes: ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 ir european regional centre: 439/445 godstone rd, whyteleafe, surrey cr3 obl, uk tel: ++ 44 (0)20 8645 8000 ir canada: 15 lincoln court, brampton, ontario l6t3z2, tel: (905) 453 2200 ir germany: saalburgstrasse 157, 61350 bad homburg tel: ++ 49 (0) 6172 96590 ir italy: via liguria 49, 10071 borgaro, torino tel: ++ 39 011 451 0111 ir japan: k&h bldg., 2f, 30-4 nishi-ikebukuro 3-chome, toshima-ku, tokyo 171 tel: 81 (0)3 3983 0086 ir southeast asia: 1 kim seng promenade, great world city west tower, 13-11, singapore 237994 tel: ++ 65 (0)838 4630 ir taiwan: 16 fl. suite d. 207, sec. 2, tun haw south road, taipei, 10673 tel: 886-(0)2 2377 9936 data and specifications subject to change without notice. 1/01 ? i sd 3.1a, di/dt 75a/ s, v dd 100v, t j 150c suggested rg =7.5 ? ? repetitive rating; pulse width limited by maximum junction temperature. ? v dd =25v, starting t j = 25c, peak i l = 3.1a, ? pulse width 300 s; duty cycle 2% case outline and dimensions ? lcc-18
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